1. Field of the Invention
The present invention relates to a system and method embodied in a high speed programmable counter that will run for a specified number of cycles, and in particular to a high speed programmable counter for large numbers of cycles using cascaded counters with a programmable branch that together provide the capability to generate a desired number of clock pulses within an extremely wide range.
2. Description of the Related Art
Microprocessors commonly use counters to provide clock signals to drive a variety of logic circuits within the microprocessor. As the complexity of microprocessors and logic elements increases, the need for larger counters, or counters that can count to greater numbers, into the millions or higher, also increases. However, as the size of a counter increases, the numbers of levels of logic required to drive the counter also increases. Consequently, the speed of that counter effectively decreases as the complexity of the logic increases. In other words, as the counters ability to count to higher numbers increases, a proportional decrease in the speed of that counter is experienced. Consequently, such counters are often too slow to drive the logic elements of microprocessors at the necessary speeds as the speeds of the microprocessors increase.
In order to address the issue of decreased speed in large counters, smaller counters have been cascaded together. In effect, cascading of two or more relatively small counters allows much higher clock speeds to be achieved by the cascaded counters than can be achieved by simply using a single large counter. However, unlike a single large counter, simply cascading two or more smaller counters does not provide the capability to generate a specific number of clock pulses that is not a modulus of the bit size of the individual counters within the cascade. As a result, when such counters are used, they will typically be set to count beyond the required number of clock pulses, thereby resulting in wasted clock pulses and decreased system performance.
Further, microprocessors often contain a large number of individual logic circuits that may each require a different, yet specific, number of clock pulses to perform a certain function. As a result, different counters are often used to provide different numbers of clock pulses to specific logic circuits. Consequently, the ability to achieve multiple specific count numbers, such as for example a prime number count, is not possible with a simple cascade of counters. Therefore, what is needed is a system and method for using a variable or programmable counter to generate specific numbers of clock pulses at high speed.